Research Area C – Overarching

One of the important tasks for the architecture of novel circuit functionality is the general or in other words, non-reconfigurable, routing and the fabrication of the metallization layers. To pay attention to this, we focus the research in Research Area C on processes for 3D structure integration as well as the modeling and simulation of the devices including the experimental verification. Evidently, this Research Area has a strong link to the Research Areas A and B as only mature devices will be implemented into the circuit and system design and the design requirements and condition rules need to be matched. This orchestration will be implemented in the very beginning of the initial phase of this TRR and is of high importance for the successful communication and evaluation of the technical results. A clear path for the system approach and the knowledge of alternative options for materials, devices and the system implementation make this TRR resilient against delays in fabrication, obstacles in device functionality and too high expectations for the use in applications. Another strength of this collaborative work here is that we can combine early research approaches with approaches that have a more mature technology level and bring them into play on demonstrator platforms and bringing the fabrication tools on both sites together.